He came and answered your questions, his company gave away a couple of Samsung Galaxy Note 3s and now ARM's Cortex A53 lead architect, Peter Greenhalgh, is joining me for a live video interview (via Google Hangouts) tomorrow at noon ET.

Update: We are starting now. You can ask questions on Google+ or just watch the stream on G+ or YouTube. And we're done. Check out the full interview below.

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  • twotwotwo - Monday, December 23, 2013 - link

    Was interesting to hear his ideal SoC would include 4 small + 2 big cores (and, good question, and glad he actually answered it). I hadn't known about the fanciness in the latest version of big.LITTLE. I can imagine cool things happening on the software side if a lot of phones shipped with that: one main thread handing little tasks to a pool of worker threads on the four little cores, for instance, or an OS scheduler that knows that certain background tasks belong on small cores even if the phone's in active use. Reply
  • fteoath64 - Tuesday, December 31, 2013 - link

    I would refine more into doing 1 Big and 3 small cores but the small cores clocked slightly differently like this: Big(1.8Ghz), Small Core0 (1.5Ghz), Core1 (1.3Ghz), Core 2 (1Ghz). The affinity of Core0 being OS mostly. This would perform close to 96% of 2Big.4Small but huge saving in die space and power reduction. I have a single core 1.5 S1 single core Scorpion SoC and running 1.2Ghz and 1.5Ghz is a small diff in performance but huge savings in power!. Reply
  • B3an - Friday, December 27, 2013 - link

    Interesting stuff, thanks. Reply

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