RISC-V

December is here, and with it comes several technical summits ahead of the holiday break. The most notable of which this week is the annual RISC-V summit, which is being put on by the Linux Foundation and sees the numerous (and ever increasing) parties involved in the open source ISA gather to talk about the latest products and advancements in the RISC-V ecosystem. The summit always tends to feature some new product announcements, and this year is no different, as Imagination Technologies is at the show to provide details on their first RISC-V CPU cores, along with announcing their intentions to develop a full suite of CPU cores over the next few years. The company, currently best known for their PowerVR GPU lineup, has...

Hot Chips 2021 Live Blog: New Tech (Infineon, EdgeQ, Samsung)

Welcome to Hot Chips! This is the annual conference all about the latest, greatest, and upcoming big silicon that gets us all excited. Stay tuned during Monday and Tuesday...

8 by Dr. Ian Cutress on 8/23/2021

Russia To Build RISC-V Processors for Laptops: 8-core, 2 GHz, 12nm, 2025

Russian outlet Vedomosti.ru today is reporting that the conglomerate Rostec, a Russian state-backed corporation specializing in investment in technology, has penned a deal with server company Yadro and silicon...

132 by Dr. Ian Cutress on 7/14/2021

Intel to Create RISC-V Development Platform with SiFive P550 Cores on 7nm in 2022

As part of SiFive’s announcements today, along with enabling SiFive IP on Intel’s Foundry Service offerings, Intel will be creating its own RISC-V development platform using its 7nm process...

35 by Dr. Ian Cutress on 6/22/2021

Intel Licenses SiFive’s Portfolio for Intel Foundry Services on 7nm

Today’s announcement from SiFive comes in two parts; this part is significant as it recognizes that Intel will be enabling SiFive’s IP portfolio on its 7nm manufacturing process for...

7 by Dr. Ian Cutress on 6/22/2021

Hot Chips 2020 Live Blog: Manticore 4096-core RISC-V (3:30pm PT)

Hot Chips has gone virtual this year! Lots of talks on lots of products, including Tiger Lake, Xe, POWER10, Xbox Series X, TPUv3, and a special Raja Koduri Keynote...

7 by Dr. Ian Cutress on 8/18/2020

Hot Chips 2020 Live Blog: Alibaba Xuantie-910 RISC-V CPU (3:00pm PT)

Hot Chips has gone virtual this year! Lots of talks on lots of products, including Tiger Lake, Xe, POWER10, Xbox Series X, TPUv3, and a special Raja Koduri Keynote...

6 by Dr. Ian Cutress on 8/17/2020

Western Digital Rolls-Out Two New SweRV RISC-V Cores For Microcontrollers

Western Digital has added two new processor cores — the SweRV Core EH2 and the SweRV Core EL2 — into its SweRV portfolio of microcontroller CPUs. And, keeping in...

14 by Anton Shilov on 12/13/2019

Samsung to Use SiFive RISC-V Cores for SoCs, Automotive, 5G Applications

At the annual RISC-V Summit this week, Samsung disclosed the use SiFive’s RISC-V cores for upcoming chips for a variety of applications. The company is joining a growing list...

18 by Anton Shilov on 12/12/2019

GlobalFoundries and SiFive to Design HBM2E Implementation on 12LP/12LP+

GlobalFoundries and SiFive announced on Tuesday that they will be co-developing an implementation of HBM2E memory for GloFo's 12LP and 12LP+ FinFET process technologies. The IP package will enable...

13 by Anton Shilov on 11/5/2019

SiFive Announces First RISC-V OoO CPU Core: The U8-Series Processor IP

In the last few year’s we’ve seen an increasing amount of talk about RISC-V and it becoming real competitor to the Arm in the embedded market. Indeed, we’ve seen...

69 by Andrei Frumusanu on 10/30/2019

SiFive Acquires USB 2.0 and 3.x IP Portfolio to Strengthen RISC-V SoCs

SiFive, one of the world’s leading developers of controllers and SoCs based on the RISC-V instruction set, has acquired USB IP portfolio from Innovative Logic, a silicon IP designer...

7 by Anton Shilov on 5/23/2019

Western Digital’s RISC-V "SweRV" Core Design Released For Free

Western Digital has published a register-transfer level (RTL) design abstraction of its in-house designed SweRV RISC-V core. The SweRV core is one of several RISC-V projects the company as...

14 by Anton Shilov on 2/15/2019

Western Digital Reveals SweRV RISC-V Core, Cache Coherency over Ethernet Initiative

Western Digital this week made three important announcements concerning its RISC-V-based processor initiative launched last year. The company introduced its own SweRV general-purpose core, its OmniXtend cache coherency over...

11 by Anton Shilov on 12/5/2018

Apacer Launches 32-Bit SODIMM for Arm & RISC-V Systems

Apacer has announced a lineup of 32-bit SO-DIMMs designed for systems based on processors featuring Arm, RISC, or RISC-V architectures. The memory modules will enable SoC developers to take...

5 by Anton Shilov on 11/26/2018

Western Digital to Use RISC-V for Controllers, Processors, Purpose-Built Platforms

Western Digital recently announced plans to use the RISC-V ISA across its existing product stack as well as for future products that will combine processing and storage. The company...

10 by Anton Shilov on 12/14/2017

SiFive Unveils Freedom Platforms for RISC-V-Based Semi-Custom Chips

SiFive, a company established by researchers who invented the RISC-V instruction set architecture in the University of California Berkeley several years ago, has this week announced two platforms which...

10 by Anton Shilov on 7/18/2016

Log in

Don't have an account? Sign up now