During a time of increased competitor activity, Intel has decided to disclose some of the high level details surrounding its next generation consumer processor, known as Rocket Lake or Intel’s 11th Gen Core. The new processor family is due in the market in the first quarter of 2021, and is expected to share a socket and motherboard compatibility with the current 10th Gen Comet Lake processors, providing an upgrade path even for those with a Core i9-10900K, Intel’s highest performing desktop processor to date. New 500-series motherboards are also expected to be available.

The new Rocket Lake-S silicon or SoC is going to be known as ‘Cypress Cove’. Intel confuses itself in the press release compared to the PDF presentation, as the press release dictates that this isn’t the core – it specifically states that the core microarchitecture is Ice Lake (Sunny Cove). However the presentation PDF says Cypress Cove is the core. In this instance, to be clear, Sunny Cove and Cypress Cove are set to be practically identical, however Sunny Cove is on 10nm and Cypress Cove is the back-ported variant on 14nm.

Paired with these cores will be the Tiger Lake graphics architecture, known as Xe-LP, which is also being backported from 10nm to 14nm for this product. The combined 14nm representation of Ice Lake cores and Xe-LP graphics is what is going to be known as Rocket Lake, (at least one of) the SoC(s) of the 11th Gen Core family.

With the new processors, Intel is targeting a raw instruction-per-clock uplift in the double digit range, which would be similar to the uplift we saw moving from Comet Lake to Intel’s Ice Lake mobile processors. Because of the node difference, the exact IPC change is likely to be lower than what we’ve seen before, but 10%+ is still highly respectable, especially if Intel is also able to maintain the high frequency it has achieved with the current generation of Comet Lake.

One of the benefits of moving to a back-ported Sunny Cove core will be the inclusion of the AVX-512 vector acceleration unit in Cypress Cove. This enables Intel to enable its library of Deep Learning Boost technologies for AI and ML acceleration, including support for Vector Neural Network Instructions (VNNI), finally bringing AVX-512 to the desktop platform.

However, to mix and match the right combination of core count, graphics, and AVX-512 for die size/yield/cost, it appears that Rocket Lake-S will only offer a maximum of eight cores in its largest configuration. Within the press release PDF, Intel stated that the current silicon as tested is rated for 125 W TDP, with a top turbo boost of 250 W, which matches what we see on the Core i9-10900K already. There’s no escaping the performance-per-watt characteristics of the process node, which indicates that Intel might find hitting those high frequencies a little easier with fewer cores to deal with. Intel is also promoting new overclocking tools with Rocket Lake, however did not go into details.

Another feature that Intel has disclosed with Rocket Lake is the move to PCIe Gen 4.0 on the processor, with up to 20 lanes available. These are likely to be split into one x16 for graphics and one x4 for storage on most motherboards, and this aligns with what we’ve seen on the latest generation of Intel Z490 motherboards, some of which have already promoted support for PCIe 4.0 ‘on future Intel processors’. This means Rocket Lake. Intel also mentions that the memory controller now supports up to DDR4-3200, however the projected performance numbers were done with DDR4-2933 memory.

On the graphics side, moving to the Xe-LP graphics architecture is going to be a big uplift in graphics performance, with Intel suggesting a 50% improvement over current Comet Lake integrated graphics. It is worth noting here in the slide that Intel mentions ‘UHD Graphics ft Xe Graphics Architecture’ – this would perhaps point to a scaled down version of Xe compared to Tiger Lake. I’m fully expecting to see only 32 EUs here, as a balance between die area, power, and performance. In the fine print it suggests that there will be some versions of Rocket Lake without the integrated graphics enabled, similar to the F processors we see on the market today.

That being said, for those units with integrated graphics, Intel is promoting new media encoders and display resolution support, with up to 4K60 12-bit for 4:4:4 HEVC and VP9, or up to 4K60 with 10-bit 4:2:0 AV1, showcasing AV1 support for mainstream processors. Display resolution support has also increased, with up to three 4K60 displays or two 5K60 displays, supporting DP 1.4a (with HBR3) and HDMI 2.0b.

This was an unexpected news announcement this morning - speaking to peers it all seems to be a bit of a surprise - perhaps even for the PR teams, given that the system configurations as 'projected' in the slide above is dated 6th August, almost 3 months ago. It will be interesting to hear if Intel will disclose more details ahead of launch.

Source: Intel

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  • smilingcrow - Thursday, October 29, 2020 - link

    That's not the reason to not release the lower tier chips at launch.
    They rightly want to maximise their profits by just releasing the top tier chips at launch which are more expensive.
    Many chips released as lower tier SKUs aren't lower binned to a significant degree but it's more a matter of segmentation based purely on price.
    With the demand for Zen 3 likely to be very high, AMD have decided to maximise profits so have delayed the cheaper SKUs.
    All good business sense.
  • yeeeeman - Friday, October 30, 2020 - link

    Exactly. Amd is entering Intel mode with zen 3.
  • Spunjji - Friday, October 30, 2020 - link

    "Amd is entering Intel mode with zen 3"

    Bit of a jump to go from "aren't shooting themselves in the foot by dropping prices while supply constrained" to "milking the market for everything it's worth and knifing competitors in the back" 😅
  • robbro9 - Thursday, October 29, 2020 - link

    So this is nearly a Tiger Lake on the latest 14 nm process? I thought the super fin or whatever advance going from 10 to 10 + (or is that 10+ to 10++) was a huge breakthrough/advantage? If so will these be severely handicapped compared to the Tiger Lakes now showing up in laptops?
  • AdrianBc - Thursday, October 29, 2020 - link

    Actually it is an Ice Lake made in the 14 nm process, but the Ice Lake and Tiger Lake cores are very similar. The main reason why Tiger Lake is much faster is because of a much higher clock frequency.

    Rocket Lake will have a higher single-core turbo frequency, at least 5.0 GHz, maybe even up to 5.3 GHz, or even higher, but that is unlikely.

    So it will have a higher single-thread performance than Tiger Lake. If the turbo frequency would reach 5.3 GHz, like Comet Lake, then the single-thread performance would slightly exceed that of Zen 3, probably taking back the 1st place in gaming from AMD.

    Nevertheless, in multi-threaded applications the efficiency of the 14-nm cores will be unavoidably low, so despite the 125/250 W power consumption Rocket Lake will be much slower than AMD Zen 3 for most professional applications.
  • Unashamed_unoriginal_username_x86 - Thursday, October 29, 2020 - link

    Good analysis, much appreciated!
  • brucethemoose - Thursday, October 29, 2020 - link

    I imagine it won't matter much since desktop chips can run at insane per-core TDPs.

    If you're interested in sweet-spot power efficiency, you should buy Tiger Lake. Or better yet, Renoir.
  • powerarmour - Thursday, October 29, 2020 - link

    Why is there so many Intel articles on this site these days?
  • Ryan Smith - Thursday, October 29, 2020 - link

    Intel's been fairly busy as of late with the Tiger Lake launch and their business transactions.

    Though taking a quick survey, this is the first Intel article we've published in a few days. Most of this week has been AMD due to their various transactions, keynotes, and product announcements.
  • Hulk - Thursday, October 29, 2020 - link

    Okay I'm confused. Can someone help me out?

    If Cyprus Cove (Rocket Lake) is a back port of Sunny Cove (Ice Lake) with the new AVX 512 instructions, which are already included in Willow Cove (Tiger Lake) then wouldn't Cyprus Cove be more aptly called a back port of Willow Cove without the larger L1/L2 cache?

    Intel is killing us not so much with their naming schemes, which are convoluted, but even more so with a lack of clarity in explaining them.

    Does Cyprus Cove include the larger L1/L2 cache of Willow Cove? If so then it is essentially Willow Cove, right? Or at least architecturally closer to Willow than Sunny?

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