Examining Intel's Ice Lake Processors: Taking a Bite of the Sunny Cove Microarchitecture

Two Versions, Two Different Power Targets

Intel has promised that Ice Lake-U will be seen in a variety of form factors, targeting anywhere from 9W to 28W. This sort of range is not new for a U-series processor – we typically see overlap from something lower down (the Y-series, ~5W) or higher up (H-series, ~45W), however Ice Lake hasn’t currently been listed for H series power budgets - only Y and U. Having such a wide window, from 5-28W, allows Intel to be very wide with binning the chips as they come of the production line, which is a very valid tactic for promoting as much yield as possible with minimal waste.

Technically there will be two different Ice Lake BGA mobile packages – one aimed at low power (7-12W) for the Y series, and another for higher power designs (15-28W) in the U series.

At this point Intel has not stated what core configurations will be in both packages, however it is likely that the lower power 7-12W ‘Type 4’ package will be for Y-series implementations only, especially given that the overall package size is only 490mm2 (26.5x18.5) compared to 1250 mm2 (50x25), making it 39% the size of the larger high power package. It stands to reason then that the smaller package is for lower performance and low power options, despite being exactly the same silicon.

This Type-4 option also uses the ‘recessed in board’ design we first saw with Broadwell-Y, which is required based on the integrated voltage regulators that Intel now uses on its low powered designs. This makes a very interesting point about Intel’s capabilities with low powered 10nm designs: one could postulate that as the recessed model is well above the traditional Y-series power line. If the 10nm process doesn’t go low down enough in power to that sub-5W range, it could either be because of power, or there isn't enough frequency for Intel to actually sell at volume. Alternatively Intel could end up increasing the base power of the Y-series. One could draw parallels with the first generation 10nm Cannon Lake Core i3-8121U at 15W, which was initially postulated to be dual-core Y-series silicon, rather than the 15W U-series designation it ended up with (our review showed that it did indeed consume more power for the same work compared to a 14nm equivalent design, which would imply a very high static power). With this in mind, it makes me wonder what percentage of Type 3 / Type 4 package designs Intel will end up shipping into the market.

Broadwell Motherboard Design for Recessed Power Implementation

Intel is keen to promote that one of the new features of Ice Lake is its Thin Magnetic Inductor Array, which helps the FIVR achieve better power conversion efficiencies and waste less power. The main issue with a FIVR is at low power consumption states that have a lot of inefficiency – some other processor designs have a linear LDO (Low-Dropout Regulator) implementation which is better for low power designs but less efficient in high power modes.