Everspin’s STT-MRAM Now Supported by Cadence’s DDR4 Controllersby Anton Shilov on August 5, 2019 7:30 PM EST
Cadence and Everspin on Monday announced that Cadence’s DDR4 IP and verification IP now support Everspin’s 1 Gb STT-MRAM. Cadence’s support will make it easier for chip designers to support MRAM.
8-bit and 16-bit DDR4 memory controllers as well as verification IP from Cadence now support Everspin’s 1 Gb STT-MRAM in a JEDEC-compliant BGA package. This enables SSD controller and flash array manufacturers to add support for MRAM to their devices. Being aimed at enterprise-class SSDs (eSSDs), Everspin’s 1 Gb STT-MRAM offers lower latencies than traditional NAND flash memory, and the manufacturer envisions their MRAM being used to significantly lower the overall latency and increase the random performance of MRAM-equipped drives versus typical SSDs.
Everspin has done quite a lot for STT-MRAM promotion. In the last couple of weeks it announced support from Phison and Sage. Now STT-MRAM is supported by Cadence. When exactly we see the fruits of this work is something that remains to be seen.
- Sage Microelectronics To Introduce Enterprise SSD Controller Supporting STT-MRAM
- Phison’s Next-Gen eSSD Controllers to Support Everspin’s STT-MRAM Caching
- Everspin Begins Production of 1Gb STT-MRAM
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MASSAMKULABOX - Tuesday, August 6, 2019 - link"When exactly we see the fruits of this work is something that remains to be seen." thats a very clunky sentence. This might filter down to us plebs in a year or two (if necessary).
wheres the AMD 34ooge ? seems to be late appearing ..
abufrejoval - Tuesday, August 6, 2019 - linkWhile I don't really care how they make NV-RAM, as long as it's fast, cheap and high capacity, I still would like to know which wall the titanium dioixde aka memristor technology hit against: Years and years of building up expectations and then.... zilch!
I'd welcome an explanation, a link, anything...
Threska - Friday, August 9, 2019 - linkSSDs still have to deal with durability, usually by massive over-provisioning.